Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 785
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
38. USB  High  Speed  Device  Port  (UDPHS)
38.1
Description
The USB High Speed Device Port (UDPHS) is compliant with the Universal Serial Bus (USB), rev 2.0 High Speed
device specification.
Each endpoint can be configured in one of several USB transfer types. It can be associated with one, two or three
banks of a dual-port RAM used to store the current data payload. If two or three banks are used, one DPR bank is
read or written by the processor, while the other is read or written by the USB device peripheral. This feature is
mandatory for isochronous endpoints. 
38.2
Embedded  Characteristics
The SAM9M10 features USB communication ports as follows:
• 2 Ports USB Host full speed OHCI and High speed EHCI
• 1 Device High speed
USB Host Port A is directly connected to the first UTMI transceiver.
The Host Port B is multiplexed with the USB device High speed and connected to the second UTMI port. The
selection between Host Port B and USB device high speed is controlled by a the  UDPHS enable bit located in the
UDPHS_CTRL control register.
Figure  38-1.
USB Selection
• USB V2.0 high-speed compliant, 480 MBits per second
• Embedded USB V2.0 UTMI+ high-speed transceiver shared with UHP HS.
• Embedded 4-KByte dual-port RAM for endpoints
• Embedded 6 channels DMA controller
• Suspend/Resume logic
• Up to 2 or 3 banks for isochronous and bulk endpoints
• Seven endpoints:
– Endpoint 0: 64 bytes, 1 bank mode
– Endpoint 1 & 2: 1024 bytes, 2 banks mode, High Bandwidth, DMA
– Endpoint 3 & 4: 1024 bytes, 3 banks mode, DMA
– Endpoint 5 & 6: 1024 bytes, 3 banks mode, High Bandwidth, DMA
HS 
Transceiver
DMA
HS
USB
 
DMA
HS EHCI
FS OHCI
PA
PB
HS 
Transceiver
1
0
EN_UDPHS