Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
895
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
40.4
Signal Description
40.5
Product Dependencies
40.5.1
Power Management
The TSADC controller is not continuously clocked. The programmer must first enable the TSADC controller Clock
in the Power Management Controller (PMC) before using the TSADC controller. However, if the application does
not require TSADC controller operations, the TSADC controller clock can be stopped when not needed and be
restarted later.
in the Power Management Controller (PMC) before using the TSADC controller. However, if the application does
not require TSADC controller operations, the TSADC controller clock can be stopped when not needed and be
restarted later.
Configuring the TSADC controller does not require the TSADC controller clock to be enabled.
40.5.2
Interrupt Sources
The TSADCC interrupt line is connected on one of the internal sources of the Advanced Interrupt Controller. Using
the TSADCC interrupt requires the AIC to be programmed first.
the TSADCC interrupt requires the AIC to be programmed first.
40.5.3
Analog Inputs
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the TSADCC input is auto-
matically done as soon as the corresponding channel is enabled by writing the register TSADCC_CHER. By
default, after reset, the PIO lines are configured as input with its pull-up enabled and the TSADCC inputs are con-
nected to the GND.
matically done as soon as the corresponding channel is enabled by writing the register TSADCC_CHER. By
default, after reset, the PIO lines are configured as input with its pull-up enabled and the TSADCC inputs are con-
nected to the GND.
40.5.4
I/O Lines
The pin TSADTRG may be shared with other peripheral functions through the PIO Controller. In this case, the PIO
Controller should be set accordingly to assign the pin TSADTRG to the TSADCC function.
Controller should be set accordingly to assign the pin TSADTRG to the TSADCC function.
40.5.5
Conversion Performances
For performance and electrical characteristics of the TSADCC, see the section “Electrical Characteristics” of the
full datasheet.
full datasheet.
Table 40-1.
TSADCC Pin Description
Pin Name
Description
VDDANA
Analog power supply
TSADVREF
Reference voltage
AD0X
P
Analog input channel 0 or Touch Screen Top channel
AD1X
M
Analog input channel 1 or Touch Screen Bottom channel
AD2Y
P
Analog input channel 2 or Touch Screen Right channel
AD3Y
M
Analog input channel 3 or Touch Screen Left channel
GPAD4 - GPAD7
General-purpose analog input channels 4 to 7
TSADTRG
External trigger
Table 40-2.
Peripheral IDs
Instance
ID
TSADCC
20
Table 40-3.
I/O Lines
Instance
Signal
I/O Line
Peripheral
TSADCC
TSADTRG
PD28
A