Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 938
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
41.4.4.3
Programming DMAC for Multiple Buffer Transfers
Notes:
1. USR means that the register field is manually programmed by the user.
2. CONT means that address are contiguous.
3. REP means that the register field is updated with its previous value. If the transfer is the first one, then the user must manu-
ally program the value.
4. Channel stalled is true if the relevant BTC interrupt is not masked.
5. LLI means that the register field is updated with the content of the linked list item.
41.4.4.4
Replay Mode of Channel Registers
During automatic replay mode, the channel registers are reloaded with their initial values at the completion of each
buffer and the new values used for the new buffer. Depending on the row number in 
, some
or all of the DMAC_SADDRx, DMAC_DADDRx, DMAC_CTRLAx and DMAC_CTRLBx channel registers are
reloaded from their initial value at the start of a buffer transfer.
41.4.4.5
Contiguous Address Between Buffers
In this case, the address between successive buffers is selected to be a continuation from the end of the previous
buffer. Enabling the source or destination address to be contiguous between buffers is a function of
D M A C _ C T R L A x . S R C _ D S C R ,  D M A C _ C F G x . S R C _ R E P ,  D M A C _ C T R L A x . D S T _ D S C R  a n d
DMAC_CFGx.DST_REP registers.
Table  41-2.
Multiple Buffers Transfer Management Table
Transfer  Type
AUTO
SRC_REP
DST_REP
SRC_DSCR
DST_DSCR
BTSIZE
SADDR
DADDR
Other 
Fields
1) Single Buffer or Last 
buffer of a multiple buffer 
transfer
0
1
1
USR
USR
USR
USR
2) Multi Buffer transfer 
with contiguous DADDR
0
0
0
1
LLI
LLI
CONT
LLI
3) Multi Buffer transfer 
with contiguous SADDR
0
0
1
0
LLI
CONT
LLI
LLI
4) Multi Buffer transfer 
with LLI support
0
0
0
LLI
LLI
LLI
LLI
5) Multi Buffer transfer 
with DADDR reloaded
0
1
0
1
LLI
LLI
REP
LLI
6) Multi Buffer transfer 
with SADDR reloaded
0
1
1
0
LLI
REP
LLI
LLI
7) Multi Buffer transfer
with BTSIZE reloaded and 
contiguous DADDR
1
0
0
1
REP
LLI
CONT
LLI
8) Multi Buffer transfer 
with BTSIZE reloaded and 
contiguous SADDR
1
0
1
0
REP
CONT
LLI
LLI
9) Automatic mode 
channel is stalling
BTsize is reloaded
1
0
0
1
1
REP
CONT
CONT
REP
10) Automatic mode 
BTSIZE, SADDR and 
DADDR reloaded
1
1
1
1
1
REP
REP
REP
REP
11) Automatic mode 
BTSIZE, SADDR reloaded 
and DADDR contiguous
1
1
0
1
1
REP
REP
CONT
REP