Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
Page of 1361
 975
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
41.6.17
DMAC  Channel  x  [x  =  0..7]  Control  B  Register
Name:
DMAC_CTRLBx [x = 0..7]
Addresses:
0xFFFFEC4C [0], 0xFFFFEC74 [1], 0xFFFFEC9C [2], 0xFFFFECC4 [3], 0xFFFFECEC [4],
0xFFFFED14 [5], 0xFFFFED3C [6], 0xFFFFED64 [7]
Access:
Read-write
Reset:
 0x00000000
• SIF:  Source  Interface  Selection  Field
00: The source transfer is done via AHB-Lite Interface 0.
01: The source transfer is done via AHB-Lite Interface 1.
10: Reserved.
11: Reserved.
• DIF:  Destination  Interface  Selection  Field
00: The destination transfer is done via AHB-Lite Interface 0.
01: The destination transfer is done via AHB-Lite Interface 1.
10: Reserved.
11: Reserved.
• SRC_PIP
0: Picture-in-Picture mode is disabled. The source data area is contiguous.
1: Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the address is
automatically increment of a user defined amount.
• DST_PIP
0: Picture-in-Picture mode is disabled. The Destination data area is contiguous.
1: Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the address
is automatically incremented by a user-defined amount.
• SRC_DSCR
0: Source address is updated when the descriptor is fetched from the memory.
1: Buffer Descriptor Fetch operation is disabled for the source.
31
30
29
28
27
26
25
24
AUTO
IEN
DST_INCR
SRC_INCR
23
22
21
20
19
18
17
16
FC
DST_DSCR
SRC_DSCR
15
14
13
12
11
10
9
8
DST_PIP
SRC_PIP
7
6
5
4
3
2
1
0
DIF
SIF