Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1165
580
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
32.7.10 UDPHS Endpoint Control Enable Register (Isochronous Endpoints)
Name: UDPHS_EPTCTLENBx 
[x=0..6] 
(ISOENDPT)
Address:
0xF803C104 [0], 0xF803C124 [1], 0xF803C144 [2], 0xF803C164 [3], 0xF803C184 [4], 0xF803C1A4 [5], 
0xF803C1C4 [6]
Access: 
Write-only
For additional Information, se
• EPT_ENABL: Endpoint Enable
0 = No effect.
1 = Enable endpoint according to the device configuration.
• AUTO_VALID: Packet Auto-Valid Enable
0 = No effect.
1 = Enable this bit to automatically validate the current packet and switch to the next bank for both IN and OUT transfers.
• INTDIS_DMA: Interrupts Disable DMA
0 = No effect.
1 = If set, when an enabled endpoint-originated interrupt is triggered, the DMA request is disabled.
• DATAX_RX: DATAx Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)
0 = No effect.
1 = Enable DATAx Interrupt.
• MDATA_RX: MDATA Interrupt Enable (Only for high bandwidth Isochronous OUT endpoints)
0 = No effect.
1 = Enable MDATA Interrupt.
• ERR_OVFLW: Overflow Error Interrupt Enable
0 = No effect.
1 = Enable Overflow Error Interrupt.
31
30
29
28
27
26
25
24
SHRT_PCKT
23
22
21
20
19
18
17
16
BUSY_BANK
15
14
13
12
11
10
9
8
ERR_FLUSH
 
ERR_CRC_NT
R
ERR_FL_ISO
TXRDY_TRER
TX_COMPLT
RXRDY_TXKL
ERR_OVFLW
7
6
5
4
3
2
1
0
MDATA_RX
DATAX_RX
INTDIS_DMA
AUTO_VALID
EPT_ENABL