Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1165
582
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
32.7.11 UDPHS Endpoint Control Disable Register (Control, Bulk, Interrupt Endpoints)
Name: UDPHS_EPTCTLDISx 
[x=0..6]
Address:
0xF803C108 [0], 0xF803C128 [1], 0xF803C148 [2], 0xF803C168 [3], 0xF803C188 [4], 0xF803C1A8 [5], 
0xF803C1C8 [6]
Access: 
Write-only
This register view is relevant only if EPT_TYPE=0x0, 0x2 or 0x3 in 
For additional Information, se
• EPT_DISABL: Endpoint Disable
0 = No effect.
1 = Disable endpoint.
• AUTO_VALID: Packet Auto-Valid Disable
0 = No effect.
1 = Disable this bit to not automatically validate the current packet.
• INTDIS_DMA: Interrupts Disable DMA
0 = No effect.
1 = Disable the “Interrupts Disable DMA”.
• NYET_DIS: NYET Enable (Only for High Speed Bulk OUT endpoints)
0 = No effect.
1 = Let the hardware handle the handshake response for the High Speed Bulk OUT transfer.
• ERR_OVFLW: Overflow Error Interrupt Disable
0 = No effect.
1 = Disable Overflow Error Interrupt.
• RXRDY_TXKL: Received OUT Data Interrupt Disable
0 = No effect.
1 = Disable Received OUT Data Interrupt.
• TX_COMPLT: Transmitted IN Data Complete Interrupt Disable
0 = No effect.
1 = Disable Transmitted IN Data Complete Interrupt.
31
30
29
28
27
26
25
24
SHRT_PCKT
23
22
21
20
19
18
17
16
BUSY_BANK
15
14
13
12
11
10
9
8
NAK_OUT
NAK_IN
STALL_SNT
RX_SETUP
TXRDY
TX_COMPLT
RXRDY_TXKL
ERR_OVFLW
7
6
5
4
3
2
1
0
NYET_DIS
INTDIS_DMA
AUTO_VALID
EPT_DISABL