Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet

Product codes
ATSAM4L-EK
Page of 173
37
42023ES–SAM–07/2013
ATSAM4L8/L4/L2
4.4
Cortex-M4 processor features and benefits summary
tight integration of system peripherals reduces area and development costs
Thumb instruction set combines high code density with 32-bit performance
code-patch ability for ROM system updates
power control optimization of system components
integrated sleep modes for low power consumption
fast code execution permits slower processor clock or increases sleep mode time
hardware division and fast digital-signal-processing orientated multiply accumulate
saturating arithmetic for signal processing
deterministic, high-performance interrupt handling for time-critical applications
memory protection unit (MPU) for safety-critical applications
extensive debug and trace capabilities:
– Serial Wire Debug and Serial Wire Trace reduce the number of pins required for debugging, 
tracing, and code profiling.
4.5
Cortex-M4 core peripherals
These are:
Nested Vectored Interrupt Controller 
The NVIC is an embedded interrupt controller that supports low latency interrupt processing.
System control block 
The System control block (SCB) is the programmers model interface to the processor. It pro-
vides system implementation information and system control, including configuration, control,
and reporting of system exceptions.
System timer 
The system timer, SysTick, is a 24-bit count-down timer. Use this as a Real Time Operating Sys-
tem (RTOS) tick timer or as a simple counter.
Memory protection unit 
The Memory protection unit (MPU) improves system reliability by defining the memory attributes
for different memory regions. It provides up to eight different regions, and an optional predefined
background region.
The complete Cortex-M4 User Guide can be found on the ARM web site: