Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
213
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
18.8.2 Read Request
Name:
READREQ
Offset:
0x02
Reset:
0x0010
Property:
–
-
z
Bit 15 – RREQ: Read Request
Writing a zero to this bit has no effect.
Writing a zero to this bit has no effect.
Writing a one to this bit requests synchronization of the register pointed to by the Address bit group (READ-
REQ.ADDR) and sets the Synchronization Busy bit in the Status register (STATUS.SYNCBUSY).
REQ.ADDR) and sets the Synchronization Busy bit in the Status register (STATUS.SYNCBUSY).
z
Bit 14 – RCONT: Read Continuously
Writing a zero to this bit disables continuous synchronization.
Writing a zero to this bit disables continuous synchronization.
Writing a one to this bit enables continuous synchronization of the register pointed to by READREQ.ADDR. The
register value will be synchronized automatically every time the register is updated.
register value will be synchronized automatically every time the register is updated.
This bit is cleared when the register pointed to by READREQ.ADDR is written.
z
Bits 13:6 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bits 5:0 – ADDR: Address
These bits select the offset of the register that needs read synchronization. In the RTC only the COUNT and
CLOCK registers, which share the same address, are available for read synchronization. Therefore, the ADDR bit
group is a read-only constant of 0x10.
These bits select the offset of the register that needs read synchronization. In the RTC only the COUNT and
CLOCK registers, which share the same address, are available for read synchronization. Therefore, the ADDR bit
group is a read-only constant of 0x10.
Bit
15
14
13
12
11
10
9
8
RREQ
RCONT
Access
W
R/W
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
ADDR[5:0]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0