Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

105

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

Load and Store with immediate offset, pre-indexed immediate offset, or post-indexed immediate offset.
Syntax

op{type}{cond} Rt, [Rn {, #offset}]

; immediate offset

op{type}{cond} Rt, [Rn, #offset]!

; pre-indexed

op{type}{cond} Rt, [Rn], #offset

; post-indexed

opD{cond} Rt, Rt2, [Rn {, #offset}]

; immediate offset, two words

opD{cond} Rt, Rt2, [Rn, #offset]!

; pre-indexed, two words

opD{cond} Rt, Rt2, [Rn], #offset

; post-indexed, two words

where:
opis one of:
LDRLoad Register.
STRStore Register.
typeis one of:
Bunsigned byte, zero extend to 32 bits on loads.
SBsigned byte, sign extend to 32 bits (LDR only).
Hunsigned halfword, zero extend to 32 bits on loads.
SHsigned halfword, sign extend to 32 bits (LDR only).
-omit, for word.
condis an optional condition code, see 

.

Rtis the register to load or store.
Rnis the register on which the memory address is based.
offsetis an offset from Rn. If offset is omitted, the address is the contents of Rn.
Rt2is the additional register to load or store for two-word operations.
Operation
LDR instructions load one or two registers with a value from memory.
STR instructions store one or two register values to memory.
Load and store instructions with immediate offset can use the following addressing modes:
Offset Addressing 
The offset value is added to or subtracted from the address obtained from the register Rn. The result is used as the 

address for the memory access. The register Rn is unaltered. The assembly language syntax for this mode is:

[Rn, #offset]