Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

109

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

Load and Store with unprivileged access.
Syntax

op{type}T{cond} Rt, [Rn {, #offset}]

; immediate offset

where:
opis one of:
LDRLoad Register.
STRStore Register.
typeis one of:
Bunsigned byte, zero extend to 32 bits on loads.
SBsigned byte, sign extend to 32 bits (LDR only).
Hunsigned halfword, zero extend to 32 bits on loads.
SHsigned halfword, sign extend to 32 bits (LDR only).
-omit, for word.
condis an optional condition code, see 

.

Rtis the register to load or store.
Rnis the register on which the memory address is based.
offsetis an offset from Rn and can be 0 to 255. 
If offset is omitted, the address is the value in Rn.
Operation
These load and store instructions perform the same function as the memory access instructions with immediate 

offset, see 

. The difference is that these instructions have only unprivileged 

access even when used in privileged software.
When used in unprivileged software, these instructions behave in exactly the same way as normal memory access 

instructions with immediate offset.
Restrictions
In these instructions:



 must not be PC



 must not be SP and must not be PC.

Condition Flags
These instructions do not change the flags.
Examples

STRBTEQ

R4, [R7]

; Conditionally store least significant byte in

; R4 to an address in R7, with unprivileged access

LDRHT

R2, [R2, #8]

; Load halfword value from an address equal to

; sum of R2 and 8 into R2, with unprivileged access