Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

114

Load and Store Register Exclusive.
Syntax

LDREX{cond} Rt, [Rn {, #offset}]

STREX{cond} Rd, Rt, [Rn {, #offset}]

LDREXB{cond} Rt, [Rn]

STREXB{cond} Rd, Rt, [Rn]

LDREXH{cond} Rt, [Rn]

STREXH{cond} Rd, Rt, [Rn]

where:
condis an optional condition code, see 

.

Rdis the destination register for the returned status.
Rtis the register to load or store.
Rnis the register on which the memory address is based.
offsetis an optional offset applied to the value in Rn. 
If offset is omitted, the address is the value in Rn.
Operation
LDREX, LDREXB, and LDREXH load a word, byte, and halfword respectively from a memory address.
STREX, STREXB, and STREXH attempt to store a word, byte, and halfword respectively to a memory address. 

The address used in any Store-Exclusive instruction must be the same as the address in the most recently 

executed Load-exclusive instruction. The value stored by the Store-Exclusive instruction must also have the same 

data size as the value loaded by the preceding Load-exclusive instruction. This means software must always use a 

Load-exclusive instruction and a matching Store-Exclusive instruction to perform a synchronization operation, see 

.

If an Store-Exclusive instruction performs the store, it writes 0 to its destination register. If it does not perform the 

store, it writes 1 to its destination register. If the Store-Exclusive instruction writes 0 to the destination register, it is 

guaranteed that no other process in the system has accessed the memory location between the Load-exclusive 

and Store-Exclusive instructions.
For reasons of performance, keep the number of instructions between corresponding Load-Exclusive and Store-

Exclusive instruction to a minimum. 
The result of executing a Store-Exclusive instruction to an address that is different from that used in the preceding 

Load-Exclusive instruction is unpredictable.

Restrictions
In these instructions:



Do not use PC



Do not use SP for Rd and Rt



For STREX, Rd must be different from both Rt and Rn



The value of offset must be a multiple of four in the range 0–1020.

Condition Flags
These instructions do not change the flags.
Examples