Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
115
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
MOV
R1, #0x1
; Initialize the ‘lock taken’ value try
LDREX
R0, [LockAddr]
; Load the lock value
CMP
R0, #0
; Is the lock free?
ITT EQ
; IT instruction for STREXEQ and CMPEQ
STREXEQ R0, R1, [LockAddr]
; Try and claim the lock
CMPEQ
R0, #0
; Did this succeed?
BNE
try
; No – try again
....
; Yes – we have the lock
12.6.4.9 CLREX
Clear Exclusive.
Syntax
Syntax
CLREX{cond}
where:
condis an optional condition code, see
condis an optional condition code, see
.
Operation
Use CLREX to make the next STREX, STREXB, or STREXH instruction write a 1 to its destination register and fail
Use CLREX to make the next STREX, STREXB, or STREXH instruction write a 1 to its destination register and fail
to perform the store. It is useful in exception handler code to force the failure of the store exclusive if the exception
occurs between a load exclusive instruction and the matching store exclusive instruction in a synchronization
operation.
See
See
for more information.
Condition Flags
These instructions do not change the flags.
Examples
These instructions do not change the flags.
Examples
CLREX