Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
153
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
12.6.6.7 SMMLA and SMMLS
Signed Most Significant Word Multiply Accumulate and Signed Most Significant Word Multiply Subtract
Syntax
op{R}{condRdRnRmRa
where:
opis one of:
SMMLA Signed Most Significant Word Multiply Accumulate.
SMMLS Signed Most Significant Word Multiply Subtract.
If the X is omitted, the multiplications are bottom × bottom and top × top.
Ris a rounding error flag. If R is specified, the result is rounded instead of being
truncated. In this case the constant 0x80000000 is added to the product before
the high word is extracted.
condis an optional condition code, see 
.
Rdis the destination register.
Rn, Rmare registers holding the first and second multiply operands.
Rais the register holding the accumulate value.
Operation
The SMMLA instruction interprets the values from Rn and Rm as signed 32-bit words.
The SMMLA instruction:
Multiplies the values in Rn and Rm.
Optionally rounds the result by adding 0x80000000.
Extracts the most significant 32 bits of the result.
Adds the value of Ra to the signed extracted value.
Writes the result of the addition in Rd.
The SMMLS instruction interprets the values from Rn and Rm as signed 32-bit words.
The SMMLS instruction:
Multiplies the values in Rn and Rm.
Optionally rounds the result by adding 0x80000000.
Extracts the most significant 32 bits of the result.
Subtracts the extracted value of the result from the value in Ra.
Writes the result of the subtraction in Rd.
Restrictions
In these instructions:
Do not use SP and do not use PC.
Condition Flags
These instructions do not affect the condition code flags.
Examples
SMMLA
R0, R4, R5, R6
; Multiplies R4 and R5, extracts top 32 bits, adds
 ; R6, truncates and writes to R0
SMMLAR R6, R2, R1, R4  ; Multiplies R2 and R1, extracts top 32 bits, adds
; R4, rounds and writes to R6
SMMLSR R3, R6, R2, R7  ; Multiplies R6 and R2, extracts top 32 bits,