Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
189
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
CPS cannot be conditional and so must not be used inside an IT block.
Condition Flags
This instruction does not change the condition flags.
Examples
This instruction does not change the condition flags.
Examples
CPSID i
; Disable interrupts and configurable fault handlers (set PRIMASK)
CPSID f
; Disable interrupts and all fault handlers (set FAULTMASK)
CPSIE i
; Enable interrupts and configurable fault handlers (clear PRIMASK)
CPSIE f
; Enable interrupts and fault handlers (clear FAULTMASK)
12.6.11.3DMB
Data Memory Barrier.
Syntax
Syntax
DMB{cond}
where:
condis an optional condition code, see
condis an optional condition code, see
.
Operation
DMB acts as a data memory barrier. It ensures that all explicit memory accesses that appear, in program order,
DMB acts as a data memory barrier. It ensures that all explicit memory accesses that appear, in program order,
before the DMB instruction are completed before any explicit memory accesses that appear, in program order,
after the DMB instruction. DMB does not affect the ordering or execution of instructions that do not access
memory.
Condition Flags
This instruction does not change the flags.
Examples
Condition Flags
This instruction does not change the flags.
Examples
DMB
; Data Memory Barrier