Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
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• NOCP: No Coprocessor Usage Fault
This is part of
. The processor does not support coprocessor instructions:
0: No usage fault caused by attempting to access a coprocessor.
1: The processor has attempted to access a coprocessor.
1: The processor has attempted to access a coprocessor.
• UNALIGNED: Unaligned Access Usage Fault
This is part of
.
0: No unaligned access fault, or unaligned access trapping not enabled.
1: The processor has made an unaligned memory access.
Enable trapping of unaligned accesses by setting the UNALIGN_TRP bit in the SCB_CCR to 1. See
1: The processor has made an unaligned memory access.
Enable trapping of unaligned accesses by setting the UNALIGN_TRP bit in the SCB_CCR to 1. See
. Unaligned LDM, STM, LDRD, and STRD instructions always fault irrespective of the setting of
UNALIGN_TRP.
• DIVBYZERO: Divide by Zero Usage Fault
This is part of
.
0: No divide by zero fault, or divide by zero trapping not enabled.
1: The processor has executed an SDIV or UDIV instruction with a divisor of 0.
When the processor sets this bit to 1, the PC value stacked for the exception return points to the instruction that performed
1: The processor has executed an SDIV or UDIV instruction with a divisor of 0.
When the processor sets this bit to 1, the PC value stacked for the exception return points to the instruction that performed
the divide by zero. Enable trapping of divide by zero by setting the DIV_0_TRP bit in the SCB_CCR to 1. See