Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
229
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
12.9.1.14Configurable Fault Status Register (Byte Access)
Name:
SCB_CFSR (BYTE)
Access:
Read
/Write
Reset:
0x00
0000000
• MMFSR: Memory Management Fault Status Subregister
The flags in the MMFSR subregister indicate the cause of memory access faults. See bitfield [7..0] description in
• BFSR: Bus Fault Status Subregister
The flags in the BFSR subregister indicate the cause of a bus access fault. See bitfield [14..8] description in
• UFSR: Usage Fault Status Subregister
The flags in the UFSR subregister indicate the cause of a usage fault. See bitfield [31..15] description in
Note: The UFSR bits are sticky. This means that as one or more fault occurs, the associated bits are set to 1. A bit that is set to 1 is
cleared to 0 only by wrting a 1 to that bit, or by a reset.
The SCB_CFSR indicates the cause of a memory management fault, bus fault, or usage fault. It is byte accessible. The
user can access the SCB_CFSR or its subregisters as follows:
• Access complete SCB_CFSR with a word access to 0xE000ED28
• Access MMFSR with a byte access to 0xE000ED28
• Access MMFSR and BFSR with a halfword access to 0xE000ED28
• Access BFSR with a byte access to 0xE000ED29
• Access UFSR with a halfword access to 0xE000ED2A.
31
30
29
28
27
26
25
24
UFSR
23
22
21
20
19
18
17
16
UFSR
15
14
13
12
11
10
9
8
BFSR
7
6
5
4
3
2
1
0
MMFSR