Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

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SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

The Reset Controller (RSTC), based on power-on reset cells, handles all the resets of the system without any 

external components. It reports which reset occurred last. 
The Reset Controller also drives independently or simultaneously the external reset and the peripheral and 

processor resets.



Management of All System Resets, Including

̶

External Devices through the NRST Pin

̶

Processor Reset

̶

Processor Peripheral Set Reset



Based on Embedded Power-on Cell



Reset Source Status

̶

Status of the Last Reset

̶

Either Software Reset, User Reset, Watchdog Reset



External Reset Signal Shaping

NRST

proc_nreset

wd_fault

periph_nreset

SLCK

Reset

State

Manager

Reset Controller

rstc_irq

NRST

Manager

exter_nreset

nrst_out

core_backup_reset

WDRPROC

user_reset

vddcore_nreset