Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

308

 RTC_TIMALR

0x400E1470

 Read

/Write

This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode Register 

(SYSC_WPMR).

Note: To change one of the SEC, MIN, HOUR fields, it is recommended to disable the field before changing the value and then re-

enable it after the change has been made. This requires up to three accesses to the RTC_TIMALR. The first access clears the 

enable corresponding to the field to change (SECEN, MINEN, HOUREN). If the field is already cleared, this access is not 

required. The second access performs the change of the value (SEC, MIN, HOUR). The third access is required to re-enable the 

field by writing 1 in SECEN, MINEN, HOUREN fields.

This field is the alarm field corresponding to the BCD-coded second counter.

0: The second-matching alarm is disabled.
1: The second-matching alarm is enabled.

This field is the alarm field corresponding to the BCD-coded minute counter.

0: The minute-matching alarm is disabled.
1: The minute-matching alarm is enabled.

This field is the alarm field corresponding to the BCD-coded hour counter.

This field is the alarm field corresponding to the BCD-coded hour counter.

0: The hour-matching alarm is disabled.
1: The hour-matching alarm is enabled.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

HOUREN

AMPM

HOUR

15

14

13

12

11

10

9

8

MINEN

MIN

7

6

5

4

3

2

1

0

SECEN

SEC