Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
373
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
21.3.2 Signal Names
Depending on the MODE settings, DATA is latched in different internal registers.
When MODE is equal to CMDE, then a new command (strobed on DATA[15:0] signals) is stored in the command
register.
PIO
PGMNCMD
Valid command available
Input
Low
Pulled-up input at reset
PGMRDY
0: Device is busy
1: Device is ready for a new command
1: Device is ready for a new command
Output
High
Pulled-up input at reset
PGMNOE
Output Enable (active high)
Input
Low
Pulled-up input at reset
PGMNVALID
0: DATA[15:0] is in input mode
1: DATA[15:0] is in output mode
1: DATA[15:0] is in output mode
Output
Low
Pulled-up input at reset
PGMM[3:0]
Specifies DATA type (see
Input
Pulled-up input at reset
PGMD[15:0]
Bi-directional data bus
Input/Output
Pulled-up input at reset
Table 21-1.
Signal Description List (Continued)
Signal Name
Function
Type
Active
Level
Comments
Table 21-2.
Mode Coding
MODE[3:0]
Symbol
Data
0000
CMDE
Command Register
0001
ADDR0
Address Register LSBs
0010
ADDR1
0011
ADDR2
0100
ADDR3
Address Register MSBs
0101
DATA
Data Register
Default
IDLE
No register
Table 21-3.
Command Bit Coding
DATA[15:0]
Symbol
Command Executed
0x0011
READ
Read Flash
0x0012
WP
Write Page Flash
0x0022
WPL
Write Page and Lock Flash
0x0032
EWP
Erase Page and Write Page
0x0042
EWPL
Erase Page and Write Page then Lock
0x0013
EA
Erase All
0x0014
SLB
Set Lock Bit
0x0024
CLB
Clear Lock Bit
0x0015
GLB
Get Lock Bit
0x0034
SGPB
Set General Purpose NVM bit
0x0044
CGPB
Clear General Purpose NVM bit