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Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
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SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
432
25.8.1 Bus Matrix Master Configuration Registers
Name:
MATRIX_MCFG0..MATRIX_MCFG3
Address:
0x400E0200
Access:
Read/Write 
• ULBT: Undefined Length Burst Type
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
ULBT
Value
Name
Description
0
INFINITE
No predicted end of burst is generated and therefore INCR bursts coming from 
this master cannot be broken.
1
SINGLE 
The undefined length burst is treated as a succession of single access allowing 
rearbitration at each beat of the INCR burst.
2
FOUR_BEAT 
The undefined length burst is split into a 4-beat bursts allowing rearbitration at 
each 4-beat burst end.
3
EIGHT_BEAT 
The undefined length burst is split into 8-beat bursts allowing rearbitration at each 
8-beat burst end.
4
SIXTEEN_BEAT 
The undefined length burst is split into 16-beat bursts allowing rearbitration at 
each 16-beat burst end.