Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

486



ENDTX flag is set when the PDC Transmit Counter register (PERIPH_TCR) reaches zero.



TXBUFE flag is set when both PERIPH_TCR and the PDC Transmit Next Counter register (PERIPH_TNCR) 

reach zero.

These status flags are described in the Peripheral Status register (PERIPH_PTSR).

The serial peripheral triggers its associated PDC channels’ transfers using transmit enable (TXEN) and receive 

enable (RXEN) flags in the transfer control register integrated in the peripheral’s user interface.
When the peripheral receives external data, it sends a Receive Ready signal to its PDC receive channel which 

then requests access to the Matrix. When access is granted, the PDC receive channel starts reading the 

peripheral Receive Holding register (RHR). The read data are stored in an internal buffer and then written to 

memory.
When the peripheral is about to send data, it sends a Transmit Ready to its PDC transmit channel which then 

requests access to the Matrix. When access is granted, the PDC transmit channel reads data from memory and 

transfers the data to the Transmit Holding register (THR) of its associated peripheral. The same peripheral sends 

data depending on its mechanism.

Each peripheral connected to the PDC sends out receive ready and transmit ready flags and the PDC returns flags 

to the peripheral. All these flags are only visible in the peripheral’s Status register. 
Depending on whether the peripheral is half- or full-duplex, the flags belong to either one single channel or two 

different channels. 

The receive transfer end flag is set when PERIPH_RCR reaches zero and the last data has been transferred to 

memory.
This flag is reset by writing a non-zero value to PERIPH_RCR or PERIPH_RNCR.

The transmit transfer end flag is set when PERIPH_TCR reaches zero and the last data has been written to the 

peripheral THR.
This flag is reset by writing a non-zero value to PERIPH_TCR or PERIPH_TNCR.

The receive buffer full flag is set when PERIPH_RCR reaches zero, with PERIPH_RNCR also set to zero and the 

last data transferred to memory.
This flag is reset by writing a non-zero value to PERIPH_TCR or PERIPH_TNCR.

The transmit buffer empty flag is set when PERIPH_TCR reaches zero, with PERIPH_TNCR also set to zero and 

the last data written to peripheral THR.
This flag is reset by writing a non-zero value to PERIPH_TCR or PERIPH_TNCR.