Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
487
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
27.5
Peripheral DMA Controller (PDC) User Interface
Note:
1. PERIPH: Ten registers are mapped in the peripheral memory space at the same offset. These can be defined by the user 
depending on the function and the desired peripheral.
Table 27-1.
Register Mapping
Offset
Register
Name
Access
Reset
0x00
Receive Pointer Register
PERIPH
_RPR
Read/Write
0
0x04
Receive Counter Register
PERIPH_RCR
Read/Write
0
0x08
Transmit Pointer Register
PERIPH_TPR
Read/Write
0
0x0C
Transmit Counter Register
PERIPH_TCR
Read/Write
0
0x10
Receive Next Pointer Register
PERIPH_RNPR
Read/Write
0
0x14
Receive Next Counter Register
PERIPH_RNCR
Read/Write
0
0x18
Transmit Next Pointer Register
PERIPH_TNPR
Read/Write
0
0x1C
Transmit Next Counter Register
PERIPH_TNCR
Read/Write
0
0x20
Transfer Control Register
PERIPH_PTCR
Write-only
0
0x24
Transfer Status Register
PERIPH_PTSR
Read-only
0