Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

616

PIO_PCISR

0x400E0F60 (PIOA), 0x400E1160 (PIOB), 0x400E1360 (PIOC)

Read-only

0: No new data is ready to be read since the last read of PIO_PCRHR.
1: A new data is ready to be read since the last read of PIO_PCRHR.
The DRDY flag is automatically reset when PIO_PCRHR is read or when the parallel capture mode is disabled.

0: No overrun error occurred since the last read of this register.
1: At least one overrun error occurred since the last read of this register.
The OVRE flag is automatically reset when this register is read or when the parallel capture mode is disabled.

0: The End of Transfer signal from the reception PDC channel is inactive.
1: The End of Transfer signal from the reception PDC channel is active.

0: The signal Buffer Full from the reception PDC channel is inactive.
1: The signal Buffer Full from the reception PDC channel is active.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

–

–

RXBUFF

ENDRX

OVRE

DRDY