Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

Product codes
ATSAM4S-WPIR-RD
Page of 1231
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
618
32.
Synchronous Serial Controller (SSC)
32.1
Description
The Synchronous Serial Controller (SSC) provides a synchronous communication link with external devices. It 
supports many serial synchronous communication protocols generally used in audio and telecom applications 
such as I2S, Short Frame Sync, Long Frame Sync, etc.
The SSC contains an independent receiver and transmitter and a common clock divider. The receiver and the 
transmitter each interface with three signals: the TD/RD signal for data, the TK/RK signal for the clock and the 
TF/RF signal for the Frame Sync. The transfers can be programmed to start automatically or on different events 
detected on the Frame Sync signal.
The SSC high-level of programmability and its two dedicated PDC channels of up to 32 bits permit a continuous 
high bit rate data transfer without processor intervention.
Featuring connection to two PDC channels, the SSC permits interfacing with low processor overhead to the 
following:
CODEC’s in master or slave mode
DAC through dedicated serial interface, particularly I2S
Magnetic card reader
32.2
Embedded Characteristics
Provides Serial Synchronous Communication Links Used in Audio and Telecom Applications 
Contains an Independent Receiver and Transmitter and a Common Clock Divider
Interfaced with Two PDC Channels (DMA Access) to Reduce Processor Overhead
Offers a Configurable Frame Sync and Data Length
Receiver and Transmitter Can be Programmed to Start Automatically or on Detection of Different Events on 
the Frame Sync Signal
Receiver and Transmitter Include a Data Signal, a Clock Signal and a Frame Synchronization Signal