Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

681

SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

 SPI_CR

0x40008000

Write-only



0: No effect.
1: Enables the SPI to transfer and receive data.



0: No effect.
1: Disables the SPI.
As soon as SPIDIS is set, SPI finishes its transfer.
All pins are set in Input mode and no data is received or transmitted.
If a transfer is in progress, the transfer is finished before the SPI is disabled.
If both SPIEN and SPIDIS are equal to one when the SPI_CR is written, the SPI is disabled.



0: No effect.
1: Reset the SPI. A software-triggered hardware reset of the SPI interface is performed.
The SPI is in Slave mode after software reset. 
PDC channels are not affected by software reset.



0: No effect.
1: The current NPCS will be de-asserted after the character written in TD has been transferred. When CSAAT is set, the 

communication with the current serial peripheral can be closed by raising the corresponding NPCS line as soon as TD 

transfer is completed. 
Refer to 

for more details.

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

LASTXFER

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

SWRST

–

–

–

–

–

SPIDIS

SPIEN