Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

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SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

The High Speed MultiMedia Card allows several read/write operations (single block, multiple blocks, stream, etc.). 

These kinds of transfer can be selected setting the Transfer Type (TRTYP) field in the HSMCI Command Register 

(HSMCI_CMDR).
These operations can be done using the features of the Peripheral DMA Controller (PDC). If the PDCMODE bit is 

set in HSMCI_MR, then all reads and writes use the PDC facilities.
In all cases, the block length (BLKLEN field) must be defined either in the Mode Register (HSMCI_MR), or in the 

Block Register (HSMCI_BLKR). This field determines the size of the data block.
Consequent to MMC Specification 3.1, two types of multiple block read (or write) transactions are defined (the host 

can use either one at any time):



Open-ended/Infinite Multiple block read (or write):
The number of blocks for the read (or write) multiple block operation is not defined. The card will 

continuously transfer (or program) data blocks until a stop transmission command is received.



Multiple block read (or write) with pre-defined block count (since version 3.1 and higher):
The card will transfer (or program) the requested number of data blocks and terminate the transaction. The 

stop command is not required at the end of this type of multiple block read (or write), unless terminated with 

an error. In order to start a multiple block read (or write) with pre-defined block count, the host must correctly 

program the HSMCI Block Register (HSMCI_BLKR). Otherwise the card will start an open-ended multiple 

block read. The BCNT field of the HSMCI_BLKR defines the number of blocks to transfer (from 1 to 65535 

blocks). Programming the value 0 in the BCNT field corresponds to an infinite block transfer.

The following flowchart (see 

) shows how to read a single block with or without use of PDC facilities. In 

this example, a polling method is used to wait for the end of read. Similarly, the user can configure the Interrupt 

Enable Register (HSMCI_IER) to trigger an interrupt at the end of read.