Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet

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SAM4S Series [DATASHEET]

Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14

In write operation, the HSMCI Mode Register (HSMCI_MR) is used to define the padding value when writing non-

multiple block size. If the bit PADV is 0, then 0x00 value is used when padding data, otherwise 0xFF is used.
If set, the bit PDCMODE enables PDC transfer.
The following flowchart (

) shows how to write a single block with or without use of PDC facilities. Polling 

or interrupt method can be used to wait for the end of write according to the contents of the Interrupt Mask Register 

(HSMCI_IMR).