Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
965
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
39.7.9 PWM Sync Channels Mode Register
Name:
PWM_SCM
Address:
0x40020020
Access:
Read/Write
This register can only be written if bits WPSWS2 and WPHWS2 are cleared in the
.
• SYNCx: Synchronous Channel x
0: Channel x is not a synchronous channel.
1: Channel x is a synchronous channel.
1: Channel x is a synchronous channel.
• UPDM: Synchronous Channels Update Mode
is set.
2. The update occurs when the Update Period is elapsed.
• PTRM: PDC Transfer Request Mode
• PTRCS: PDC Transfer Request Comparison Selection
Selection of the comparison used to set the flag WRDY and the corresponding PDC transfer request.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
PTRCS
PTRM
–
–
UPDM
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
SYNC3
SYNC2
SYNC1
SYNC0
Value
Name
Description
0
MODE0
Manual write of double buffer registers and manual update of synchronous channels
1
MODE1
Manual write of double buffer registers and automatic update of synchronous channels
2
MODE2
Automatic write of duty-cycle update registers by the PDC and automatic update of synchronous
channels
UPDM
PTRM
WRDY Flag and PDCTransfer Request
0
x
The WRDY flag in
and the PDC transfer request are never set
to ‘1’.
1
x
is set to ‘1’ as soon as the update period is
elapsed, the PDCtransfer request is never set to ‘1’.
2
0
The WRDY flag in
and the PDC transfer request are set to ‘1’
as soon as the update period is elapsed.
1
The WRDY flag in
and the PDC transfer request are set to ‘1’
as soon as the selected comparison matches.