Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
966
39.7.10 PWM Sync Channels Update Control Register
Name:
PWM_SCUC
Address:
0x40020028
Access:
Read/Write
• UPDULOCK: Synchronous Channels Update Unlock
0: No effect
1: If the UPDM field is set to ‘0’ in
1: If the UPDM field is set to ‘0’ in
, writing the UPDULOCK bit to ‘1’ triggers the
update of the period value, the duty-cycle and the dead-time values of synchronous channels at the beginning of the next
PWM period. If the field UPDM is set to ‘1’ or ‘2’, writing the UPDULOCK bit to ‘1’ triggers only the update of the period
value and of the dead-time values of synchronous channels.
This bit is automatically reset when the update is done.
This bit is automatically reset when the update is done.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
–
–
UPDULOCK