Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

Figure 12-3. High Speed Mode

A dedicated command, Quick Page Read (QPR), is provided to read all words in an addressed
page. All bits in all words in this page are AND’ed together, returning a 1-bit result. This result is
placed in the Quick Page Read Result (QPRR) bit in Flash Status Register (FSR). The QPR
command is useful to check that a page is in an erased state. The QPR instruction is much
faster than performing the erased-page check using a regular software subroutine.

The internal memory area reserved for the embedded flash can also be written through a write-
only page buffer. The page buffer is addressed only by the address bits required to address w
words (since the page buffer is word addressable) and thus wrap around within the internal
memory area address space and appear to be repeated within it.

When writing to the page buffer, the PAGEN field in the FCMD register is updated with the page
number corresponding to page address of the latest word written into the page buffer. 

The page buffer is also used for writes to the User page. 

Write operations can be prevented by programming the Memory Protection Unit of the CPU.
Writing 8-bit and 16-bit data to the page buffer is not allowed and may lead to unpredictable data
corruption.

Page buffer write operations are performed with 2.2.0 wait states.

Writing to the page buffer can only change page buffer bits from one to zero, ie writing
0xaaaaaaaa to a page buffer location that has the value 0x00000000, will not change the page
buffer value. The only way to change a bit from zero to one, is to reset the entire page buffer with
the Clear Page Buffer command.

Frequency

Frequency limit 

for 0 wait state 

operation

Nor

m

al

High

Speed mode

1 wait state
0 wait state