Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

In order to use this module, other parts of the system must be configured correctly, as described
below.

The pins used for interfacing the compliant external devices may be multiplexed with I/O Con-
troller lines. The user must first configure the I/O Controller to assign the EBI pins to their
peripheral functions.

To prevent bus errors EBI operation must be terminated before entering sleep mode.

A number of clocks can be selected as source for the EBI. The selected clock must be enabled
by the Power Manager.

The following clock sources are available:

• CLK_EBI

• CLK_SDRAMC

• CLK_SMC

ADDR[17]

BA1

ADDR[17]

SDRAMC Bank 1 

SMCAddress Bus Line 17 

Output

NRD

NRD

CFNOE

SMC Read Signal 

CompactFlash CFNOE 

Output

Low

NWE0

NWE0-NWE

CFNWE

SMC Write Enable10 or Write enable 

CompactFlash CFNWE 

Output

Low

NCS[4]

NCS[4]

CFCS[0]

SMC Chip Select Line 4

CompactFlash Chip Select Line 0

Output

Low

NCS[5]

NCS[5]

CFCS[1]

SMC Chip Select Line 5

CompactFlash Chip Select Line 1

Output

Low

NCS[2]

NCS[2]

NANDCS[0]

SMC Chip Select Line 2

NANDFlash/SmartMedia Chip Select Line 
0

Output

Low

NCS[3]

NCS[3]

NANDCS[1]

SMC Chip Select Line 3

NANDFlash/SmartMedia Chip Select Line 
1

Output

Low

NWE1

DQM1/

NWE1-NBS1/

CFNIORD

SDRAMC DQM1 

SMC Write Enable1 or Byte Select 1 

CompactFlash CFNIORD 

Output