Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

The EBI transfers data between the internal HSB bus (handled by the HMATRIX) and the exter-
nal memories or peripheral devices. It controls the waveforms and the parameters of the
external address, data and control busses and is composed of the following elements:

• The Static Memory Controller (SMC)

• The SDRAM Controller (SDRAMC)

• The ECCHRS Controller (ECCHRS)

• A chip select assignment feature that assigns an HSB address space to the external devices

• A multiplex controller circuit that shares the pins between the different memory controllers

• Programmable CompactFlash support logic

• Programmable SmartMedia and NAND Flash support logic

The EBI offers a complete set of control signals that share the 16-bit data lines, the address
lines of up to 24 bits and the control signals through a multiplex logic operating in function of the
memory area requests.

Multiplexing is specifically organized in order to guarantee the maintenance of the address and
output control lines at a stable state while no external access is being performed. Multiplexing is
also designed to respect the data float times defined in the Memory Controllers. Furthermore,
refresh cycles of the SDRAM are executed independently by the SDRAMC without delaying the
other external memory controller accesses.

For information on the Static Memory Controller, refer to the Static Memory Controller Section.

Writing a one to the HMATRIX.SFR6.CS1A bit enables the SDRAM logic.

For information on the SDRAM Controller, refer to the SDRAM Section.

For information on the ECCHRS Controller, refer to the ECCHRS Section.

2

CS2A

0 = Chip Select 2 (NCS[2]) is connected to a Static Memory device. For each 
access to the NCS[2] memory space, all related pins act as SMC pins

1 = Chip Select 2 (NCS[2]) is connected to a NandFlash or a SmartMedia 
device. For each access to the NCS[2] memory space, all related pins act as 
NandFlash or SmartMedia pins

1

CS1A

0 = Chip Select 1 (NCS[1]) is connected to a Static Memory device. For each 
access to the NCS[1] memory space, all related pins act as SMC pins

1 = Chip Select 1 (NCS[1]) is connected to a SDRAM device. For each access 
to the NCS[1] memory space, all related pins act as SDRAM pins

0

Reserved

EBI Special Function Register Fields Description