Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
53
32072H–AVR32–10/2012
AT32UC3A3
lists parts of the device that are reset, depending on the reset source.
The cause of the last reset can be read from the RCAUSE register. This register contains one bit
for each reset source, and can be read during the boot sequence of an application to determine
the proper action to be taken.
for each reset source, and can be read during the boot sequence of an application to determine
the proper action to be taken.
7.5.11.1
Power-On detector
The Power-On Detector monitors the VDDCORE supply pin and generates a reset when the
device is powered on. The reset is active until the supply voltage from the linear regulator is
above the power-on threshold level. The reset will be re-activated if the voltage drops below the
power-on threshold level. See Electrical Characteristics for parametric details.
device is powered on. The reset is active until the supply voltage from the linear regulator is
above the power-on threshold level. The reset will be re-activated if the voltage drops below the
power-on threshold level. See Electrical Characteristics for parametric details.
7.5.11.2
Brown-Out detector
The Brown-Out Detector (BOD) monitors the VDDCORE supply pin and compares the supply
voltage to the brown-out detection level, as set in BOD.LEVEL. The BOD is disabled by default,
but can be enabled either by software or by flash fuses. The Brown-Out Detector can either gen-
erate an interrupt or a reset when the supply voltage is below the brown-out detection level. In
any case, the BOD output is available in bit POSCSR.BODDET bit.
voltage to the brown-out detection level, as set in BOD.LEVEL. The BOD is disabled by default,
but can be enabled either by software or by flash fuses. The Brown-Out Detector can either gen-
erate an interrupt or a reset when the supply voltage is below the brown-out detection level. In
any case, the BOD output is available in bit POSCSR.BODDET bit.
Note that any change to the BOD.LEVEL field of the BOD register should be done with the BOD
deactivated to avoid spurious reset or interrupt.
deactivated to avoid spurious reset or interrupt.
See Electrical Characteristics chapter for parametric details.
Table 7-4.
Effect of the Different Reset Events
Power-On
Reset
External
Reset
Watchdog
Reset
BOD
Reset
BOD33
Reset
CPU
Error
Error
Reset
OCD
Reset
CPU/HSB/PBA/PBB
(excluding Power Manager)
Y
Y
Y
Y
Y
Y
Y
32 KHz oscillator
Y
N
N
N
N
N
N
RTC control register
Y
N
N
N
N
N
N
GPLP registers
Y
N
N
N
N
N
N
Watchdog control register
Y
Y
N
Y
Y
Y
Y
Voltage calibration register
Y
N
N
N
N
N
N
RCSYS Calibration register
Y
N
N
N
N
N
N
BOD control register
Y
Y
N
N
N
N
N
BOD33 control register
Y
Y
N
N
N
N
N
Bandgap control register
Y
Y
N
N
N
N
N
Clock control registers
Y
Y
Y
Y
Y
Y
Y
Osc0/Osc1 and control registers
Y
Y
Y
Y
Y
Y
Y
PLL0/PLL1 and control registers
Y
Y
Y
Y
Y
Y
Y
OCD system and OCD registers
Y
Y
N
Y
Y
Y
N