Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
614
32072H–AVR32–10/2012
AT32UC3A3
25.7.15
Manchester Configuration Register
Name:
MAN
Access Type:
Read-write
Offset:
0x50
Reset Value:
0x30011004
This register can only be written if write protection is disabled in the
(WPMR.WPEN is zero).
• DRIFT: Drift cCompensation
0: The USART can not recover from a clock drift.
1: The USART can recover from clock drift (only available in 16x oversampling mode).
• RX_MPOL: Receiver Manchester Polarity
0: Zeroes are encoded as zero-to-one transitions, and ones are encoded as a one-to-zero transitions.
1: Zeroes are encoded as one-to-zero transitions, and ones are encoded as a zero-to-one transitions.
• RX_PP: Receiver Preamble Pattern detected
• RX_PL: Receiver Preamble Length
0: The receiver preamble pattern detection is disabled.
1 - 15: The detected preamble length is RX_PL bit periods.
• TX_MPOL: Transmitter Manchester Polarity
0: Zeroes are encoded as zero-to-one transitions, and ones are encoded as a one-to-zero transitions.
1: Zeroes are encoded as one-to-zero transitions, and ones are encoded as a zero-to-one transitions.
31
30
29
28
27
26
25
24
–
DRIFT
1
RX_MPOL
–
–
RX_PP
23
22
21
20
19
18
17
16
–
–
–
–
RX_PL
15
14
13
12
11
10
9
8
–
–
–
TX_MPOL
–
–
TX_PP
7
6
5
4
3
2
1
0
–
–
–
–
TX_PL
Table 25-27.
RX_PP
Preamble Pattern default polarity assumed (RX_MPOL field not set)
0
0
ALL_ONE
0
1
ALL_ZERO
1
0
ZERO_ONE
1
1
ONE_ZERO