Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

Product codes
AT32UC3A3-XPLD
Page of 1021
846
32072H–AVR32–10/2012
AT32UC3A3
31.7.3
Data Time-out Register
Name: DTOR
Access Type: Read/Write
Offset: 0x008
Reset Value:
0x00000000
 
These two fields determine the maximum number of CLK_MCI cycles that the MCI waits between two data block transfers. 
It is equal to (DTOCYC x Multiplier).
If the data time-out defined by DTOCYC and DTOMUL has been exceeded, the Data Time-out Error bit in the SR register 
(SR.DTOE) is set.
• DTOMUL: Data Time-out Multiplier
Multiplier is defined by DTOMUL as shown in the following table
• DTOCYC: Data Time-out Cycle Number
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
-
DTOMUL
DTOCYC
DTOMUL
Multiplier
0
1
1
16
2
128
3
256
4
1024
5
4096
6
65536
7
1048576