Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

Other security mechanisms can also restrict these functions. If such mechanisms are present
they are listed in the SAB address map section.

 shows bit patterns to be shifted in a format like "

peb01". Each character

corresponds to one bit, and eight bits are grouped together for readability. The least significant-
bit is always shifted first, and the most significant bit shifted last. The symbols used are shown in

.

In many cases, it is not required to shift all bits through the data register. Bit patterns are shown
using the full width of the shift register, but the suggested or required bits are emphasized using
bold text. I.e. given the pattern "aaaaaaar xxxxxxxx xxxxxxxx xxxxxxxx xx", the shift register is
34 bits, but the test or debug unit may choose to shift only 8 bits "

aaaaaaar".

The following describes how to interpret the fields in the instruction description tables:

Symbol Description

0

Constant low value - always reads as zero.

1

Constant high value - always reads as one.

a

An address bit - always scanned with the least significant bit first

b

A busy bit. Reads as one if the SAB was busy, or zero if it was not. See 

 for 

details on how the busy reporting works.

d

A data bit - always scanned with the least significant bit first.

e

An error bit. Reads as one if an error occurred, or zero if not. See 

 for 

details on how the error reporting works.

p

The chip protected bit. Some devices may be set in a protected state where access to chip 
internals are severely restricted. See the documentation for the specific device for details. 
On devices without this possibility, this bit always reads as zero.

r

A direction bit. Set to one to request a read, set to zero to request a write.

s

A size bit. The size encoding is described where used.

x

A don’t care bit. Any value can be shifted in, and output data should be ignored.

Instruction Description

IR input value

Shows the bit pattern to shift into IR in the Shift-IR state in order to select this 
instruction. The pattern is show both in binary and in hexadecimal form for 
convenience.

Example: 10000 (0x10)

IR output value

Shows the bit pattern shifted out of IR in the Shift-IR state when this instruction is 
active.

Example: peb01