Atmel SAM4L Xplained Pro Evaluation Kit Atmel ATSAM4L-XPRO ATSAM4L-XPRO Data Sheet

Product codes
ATSAM4L-XPRO
Page of 1204
669
42023E–SAM–07/2013
ATSAM4L8/L4/L2
26.7.3.2
Master Mode Flow Diagram 
Figure 26-6. Master Mode Flow Diagram
SPI Enable
CSAAT ?
PS ?
1
0
0
1
1
NPCS = TDR(PCS)
NPCS = MR(PCS)
Delay DLYBS
Serializer = TDR(TD)
TDRE = 1
Data Transfer
RDR(RD) = Serializer
RDRF = 1
TDRE ?
NPCS = 0xF
Delay DLYBCS
Fixed
 peripheral
Variable 
peripheral
Delay DLYBCT
0
1
CSAAT ?
0
TDRE ?
1
0
PS ?
0
1
TDR(PCS)
= NPCS ?
no
yes
MR(PCS)
= NPCS ?
no
NPCS = 0xF
Delay DLYBCS
NPCS = TDR(PCS)
NPCS = 0xF
Delay DLYBCS
NPCS = MR(PCS),
                TDR(PCS) 
Fixed
 peripheral
Variable 
peripheral
- NPCS defines the current Chip Select
- CSAAT, DLYBS, DLYBCT refer to the fields of the 
  Chip Select Register corresponding to the Current Chip Select
- When NPCS is 0xF, CSAAT is 0.