Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet

42023E–SAM–07/2013

Wake up mechanism is enabled by writing a one to the Wake up Enable (WEN) bit in configura-
tion register. It is disabled by writing a one to the Wake up Disable bit (WDIS). Moreover LCDCA
interrupt request must not be masked (see previous section) and LCDCA bit in Asynchronous
Wake Up Enable register (AWEN.LCDCA) must be set to one (see Power Manager chapter).

Wake up signal is generated when frame counter 0 rolls over. When wake up is detected in
Power Manager, system clocks are running therefore SR.FC0R is set to one and LCDCA irq is
generated. CPU is then woken up.

Wake up signal is cleared by disabling wake up mechanism.

To operate correctly, LCD controller requires a reference level. The External BIAS bit (XBIAS) in
CFG register selects the source of V

 LCD

. If XBIAS is zero, V

 LCD

 sources voltages from the inter-

nal bandgap reference. Otherwise, V

 LCD

 must be powered externally.

Note that when using external V

 LCD

, the fine contrast controlled by CFG.FCST is inoperative.

Figure 39-13. LCD Power Supply Block Diagram

Table 39-11. LCD Power Supply Pins

0

x

H.Z.

H.Z.

H.Z.

H.Z.

1

0

V

LCD

2/3 V

LCD

(also in static 

mode)

1/3 V

LCD

(also in static mode)

Capacitor

Pump Charge 

1

Input for 

VLCD

- Input for BIAS2
- H.Z. if static 
bias

- Input for BIAS1
- H.Z. if static bias

H.Z.

BIAS1

BIAS2

V

CAPL

CAPH

COMy

SEGx

XBIAS

x3

x2

x1

BANDGAP

Reference

Pump

Contrast