Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet
Product codes
ATSAM4L-EK
1080
42023E–SAM–07/2013
ATSAM4L8/L4/L2
40. Parallel Capture (PARC)
Rev: 1.0.0.0
40.1
Features
•
Captures 8-bits data with external input clock
•
External data enables supported
•
Various enable conditions
•
Peripheral DMA supported
•
Peripheral events supported
40.2
Overview
The Parallel Capture peripheral samples an external 8-bit bus with an external input clock. It can
be connected to a CMOS digital image sensor, an ADC, a DSP synchronous port,...
be connected to a CMOS digital image sensor, an ADC, a DSP synchronous port,...
The number of PARC modules implemented is device specific. Refer to the Module Configura-
tion section for details.
tion section for details.
40.3
Block Diagram
Figure 40-1. PARC Block Diagram
40.4
I/O Lines Description
40.5
Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
below.
PARC
PCCK
PCDATA[7:0]
PCEN1
PCEN2
PEVC
Events
Peripheral
Bus
CPU / PDCA
RHR
Buffer
I/O
Controller
Table 40-1.
I/O Lines Description
Pin Name
Pin Description
Type
PCCK
Clock
Input
PCD[7:0]
Data
Input
PCEN1
Data Enable 1
Input
PCEN2
Data Enable 2
Input