Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet
Product codes
ATSAM4L-EK
159
42023E–SAM–07/2013
ATSAM4L8/L4/L2
11.7
Module Configuration
The specific configuration for each BPM instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks. Refer to the “Synchronous
Clocks”, “Peripheral Clock Masking” and “Power Save Modes” sections for details.
bus clocks listed here are connected to the system bus clocks. Refer to the “Synchronous
Clocks”, “Peripheral Clock Masking” and “Power Save Modes” sections for details.
Table 11-6.
Power Manager Clocks
Clock Name
Description
CLK_BPM
Clock for the BPM bus interface
Table 11-7.
Register Reset Values
Register
Reset Value
VERSION
0x00000120