Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet

Product codes
ATSAM4L-EK
Page of 1204
312
42023E–SAM–07/2013
ATSAM4L8/L4/L2
15.5.2
Slave Configuration Registers
Name:
SCFG0...SCFG15
Access Type:
Read/Write
Offset:
0x40 - 0x7C
Reset Value:
0x00000010
ARBT: Arbitration Type
0: Round-Robin Arbitration
1: Fixed Priority Arbitration
FIXED_DEFMSTR: Fixed Default Master
This is the number of the Default Master for this slave. Only used if DEFMSTR_TYPE is 2. Specifying the number of a master 
which is not connected to the selected slave is equivalent to setting DEFMSTR_TYPE to 0.
DEFMSTR_TYPE: Default Master Type
0: No Default Master
At the end of the current slave access, if no other master request is pending, the slave is disconnected from all masters.
This results in a one cycle latency for the first access of a burst transfer or for a single access.
1: Last Default Master
At the end of the current slave access, if no other master request is pending, the slave stays connected to the last master having 
accessed it.
This results in not having one cycle latency when the last master tries to access the slave again.
2: Fixed Default Master
At the end of the current slave access, if no other master request is pending, the slave connects to the fixed master the number 
that has been written in the FIXED_DEFMSTR field.
This results in not having one cycle latency when the fixed master tries to access the slave again.
SLOT_CYCLE: Maximum Number of Allowed Cycles for a Burst
When the SLOT_CYCLE limit is reached for a burst, it may be broken by another master trying to access this slave.
This limit has been placed to avoid locking a very slow slave when very long bursts are used.
This limit must not be very small. Unreasonably small values break every burst and the Bus Matrix arbitrates without performing 
any data transfer. 16 cycles is a reasonable value for SLOT_CYCLE.
31
30
29
28
27
26
25
24
ARBT
23
22
21
20
19
18
17
16
FIXED_DEFMSTR
DEFMSTR_TYPE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SLOT_CYCLE