Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet
Product codes
ATSAM4L-EK
591
42023E–SAM–07/2013
ATSAM4L8/L4/L2
The DTR pin is controlled by the DTR enable and disable bits in CR (CR.DTREN and
CR.DTRDIS). Writing a one to CR.DTRDIS drives DTR high, and writing a one to CR.DTREN
drives DTR low. The RTS pin is controlled automatically.
CR.DTRDIS). Writing a one to CR.DTRDIS drives DTR high, and writing a one to CR.DTREN
drives DTR low. The RTS pin is controlled automatically.
Detected level changes are reported by the respective Input Change bits in CSR (CSR.RIIC,
CSR.DSRIC, CSR.DCDIC, and CSR.CTSIC). An interrupt request is generated if the corre-
sponding bit in the Interrupt Mask Register is set. The Input Change bits in CSR are
automatically cleared when CSR is read. When the CTS pin goes high, the USART will wait for
the transmitter to complete any ongoing character transmission before automatically disabling it.
CSR.DSRIC, CSR.DCDIC, and CSR.CTSIC). An interrupt request is generated if the corre-
sponding bit in the Interrupt Mask Register is set. The Input Change bits in CSR are
automatically cleared when CSR is read. When the CTS pin goes high, the USART will wait for
the transmitter to complete any ongoing character transmission before automatically disabling it.
24.6.8
ISO7816 Mode
The USART features an ISO7816 compatible mode, enabling interfacing with smart cards and
Security Access Modules (SAM) through an ISO7816 compliant link. T=0 and T=1 protocols, as
defined in the ISO7816 standard, are supported. The ISO7816 mode is selected by writing the
value 0x4 (T=0 protocol) or 0x6 (T=1 protocol) to MR.MODE.
Security Access Modules (SAM) through an ISO7816 compliant link. T=0 and T=1 protocols, as
defined in the ISO7816 standard, are supported. The ISO7816 mode is selected by writing the
value 0x4 (T=0 protocol) or 0x6 (T=1 protocol) to MR.MODE.
24.6.8.1
ISO7816 Mode Overview
ISO7816 specifies half duplex communication on one bidirectional line. The baud rate is a frac-
tion of the clock provided by the master on the CLK pin (see
tion of the clock provided by the master on the CLK pin (see
). The USART connects to a smart card as shown in
. The TXD pin is bidirec-
tional and is routed to the receiver when the transmitter is disabled. Having both receiver and
transmitter enabled simultaneously may lead to unpredictable results.
transmitter enabled simultaneously may lead to unpredictable results.
Figure 24-21. USART (Master) Connected to a Smart Card
In both T=0 and T=1 modes, the character format is fixed to eight data bits, and one or two stop
bits, regardless of CHRL, MODE9, and CHMODE values. Parity according to specification is
even. If the inverse transmission format is used, where payload data bits are transmitted
inverted on the I/O line, the user can either use odd parity and perform an XOR on data headed
to THR and coming from RHR, or write a one to MR.INVDATA and let the device handle the rest.
bits, regardless of CHRL, MODE9, and CHMODE values. Parity according to specification is
even. If the inverse transmission format is used, where payload data bits are transmitted
inverted on the I/O line, the user can either use odd parity and perform an XOR on data headed
to THR and coming from RHR, or write a one to MR.INVDATA and let the device handle the rest.
24.6.8.2
Baud Rate in ISO 7816 Mode
The ISO7816 specification defines the bit rate with the following formula:
where:
DSR
6
107
From terminal to modem
DCD
8
109
From terminal to modem
RI
22
125
From terminal to modem
Table 24-8.
Circuit References
USART Pin
V.24
CCITT
Direction
CLK
TXD
USART
CLK
I/O
Smart
Card
B
Di
Fi
------
f
×
=