Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet
Product codes
ATSAM4L-EK
608
42023E–SAM–07/2013
ATSAM4L8/L4/L2
Figure 24-42. Slave Node with Peripheral DMA Controller
24.6.13
Wake-up Request
Any node in a sleeping LIN cluster may request a wake-up. By writing to the Wakeup Signal
Type bit (LINMR.WKUPTYP), the user can choose to send either a LIN 1.3 (WKUPTYP is one )
or a LIN 2.0 (WKUPTYP is zero) compliant wakeup request. Writing a one to the Send LIN
Wakeup Signal bit (CR.LINWKUP), transmits a wakeup, and when completed, sets CSR.LINTC.
Type bit (LINMR.WKUPTYP), the user can choose to send either a LIN 1.3 (WKUPTYP is one )
or a LIN 2.0 (WKUPTYP is zero) compliant wakeup request. Writing a one to the Send LIN
Wakeup Signal bit (CR.LINWKUP), transmits a wakeup, and when completed, sets CSR.LINTC.
According to LIN 1.3, the wakeup request should be generated with the character 0x80 in order
to impose eight successive dominant bits.
to impose eight successive dominant bits.
According to LIN 2.0, the wakeup request is issued by forcing the bus into the dominant state for
250µs to 5ms. Sending the character 0xF0 does this, regardless of baud rate.
250µs to 5ms. Sending the character 0xF0 does this, regardless of baud rate.
• Baud rate max = 20 kbit/s -> one bit period = 50µs -> five bit periods = 250µs
• Baud rate min = 1 kbit/s -> one bit period = 1ms -> five bit periods = 5ms
24.6.14
Bus Idle Time-out
LIN bus inactivity should eventually cause slaves to time out and enter sleep mode. LIN 1.3
specifies this to 25000 bit periods, whilst LIN 2.0 specifies 4 seconds. For the time-out counter
operation see
specifies this to 25000 bit periods, whilst LIN 2.0 specifies 4 seconds. For the time-out counter
operation see
24.6.15
SPI Mode
The USART features a Serial Peripheral Interface (SPI) link compliant mode, supporting syn-
chronous, full-duplex communication in both master and slave mode. Writing 0xE (master) or
0xF (slave) to MR.MODE will enable this mode. An SPI in master mode controls the data flow to
and from the other SPI devices, which are in slave mode. It is possible to let devices take turns
being masters (aka multi-master protocol), and one master may shift data simultaneously into
several slaves, but only one slave may respond at a time. A slave is selected when its slave
chronous, full-duplex communication in both master and slave mode. Writing 0xE (master) or
0xF (slave) to MR.MODE will enable this mode. An SPI in master mode controls the data flow to
and from the other SPI devices, which are in slave mode. It is possible to let devices take turns
being masters (aka multi-master protocol), and one master may shift data simultaneously into
several slaves, but only one slave may respond at a time. A slave is selected when its slave
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DATA 0
DATA N
RXRDY
Peripheral
Bus
READ BUFFER
NACT = SUBSCRIBE
DATA 0
DATA N
TXRDY
Peripheral
bus
WRITE BUFFER
USART LIN
CONTROLLER
USART LIN
CONTROLLER
Peripheral DMA
Controller
Peripheral DMA
Controller
Table 24-15. Receiver Time-out Values (RTOR.TO)
LIN Specification
Baud Rate
Time-out period
TO
2.0
1 000 bit/s
4s
4 000
2 400 bit/s
9 600
9 600 bit/s
38 400
19 200 bit/s
76 800
20 000 bit/s
80 000
1.3
-
25 000 bit periods
25 000