Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet
Product codes
ATSAM4L-EK
673
42023E–SAM–07/2013
ATSAM4L8/L4/L2
Figure 26-8. Peripheral Deselection
CSRn.CSAAT and CSRn.CSNAAT bits.
26.7.3.9
Mode Fault Detection
The SPI is capable of detecting a mode fault when it is configured in master mode and NPCS0,
MOSI, MISO, and SPCK are configured as open drain through the I/O Controller with either
internal or external pullup resistors. If the I/O Controller does not have open-drain capability,
mode fault detection
MOSI, MISO, and SPCK are configured as open drain through the I/O Controller with either
internal or external pullup resistors. If the I/O Controller does not have open-drain capability,
mode fault detection
must be disabled by writing a one to the Mode Fault Detection bit in the MR
A
NPCS[0..3]
Write TDR
TDRE
NPCS[0..3]
Write TDR
TDRE
NPCS[0..3]
Write TDR
TDRE
DLYBCS
PCS = A
DLYBCS
DLYBCT
A
PCS = B
B
DLYBCS
PCS = A
DLYBCS
DLYBCT
A
PCS = B
B
DLYBCS
DLYBCT
PCS=A
A
DLYBCS
DLYBCT
A
PCS = A
A
A
DLYBCT
A
A
CSAAT = 0 and CSNAAT = 0
DLYBCT
A
A
CSAAT = 1 and CSNAAT= 0 / 1
A
DLYBCS
PCS = A
DLYBCT
A
A
CSAAT = 0 and CSNAAT = 1
NPCS[0..3]
Write TDR
TDRE
PCS = A
DLYBCT
A
A
CSAAT = 0 and CSNAAT = 0