Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet
Product codes
ATSAM4L-EK
917
42023E–SAM–07/2013
ATSAM4L8/L4/L2
34.3
Block Diagram
Figure 34-1. CATB Block Diagram
34.4
I/O Lines Description
34.5
Product Dependencies
In order to use the CATB module, other parts of the system must be configured correctly, as
described below.
described below.
34.5.1
I/O Lines
The CATB pins may be multiplexed with the I/O Controller lines. The user must first configure
the I/O Controller to assign the desired CATB pins to their peripheral functions.
the I/O Controller to assign the desired CATB pins to their peripheral functions.
34.5.2
Power Management
If the CPU enters a sleep mode that disables clocks used by the CATB, it will stop functioning
and the CATB must be reinitialized to resume operation after the system wakes up from sleep
mode. Ongoing measurements will be invalid. The CATB can automatically request clocks when
using the Peripheral Event System. The CATB is able to wake the system from sleep mode
using interrupts.
and the CATB must be reinitialized to resume operation after the system wakes up from sleep
mode. Ongoing measurements will be invalid. The CATB can automatically request clocks when
using the Peripheral Event System. The CATB is able to wake the system from sleep mode
using interrupts.
34.5.3
Clocks
The clock for the CATB bus interface (CLK_CATB) is generated by the Power Manager (PM).
This clock is enabled at reset, and can be disabled in the PM. It is recommended to disable the
CATB before disabling this clock, in order to avoid freezing the CATB in an undefined state.
This clock is enabled at reset, and can be disabled in the PM. It is recommended to disable the
CATB before disabling this clock, in order to avoid freezing the CATB in an undefined state.
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Capacitance
Counter
Filter
Threshold
Interface Registers
TOP
SPREAD
REPEAT
CHARGET
TIDLE
TLEVEL
IDLE
RAW
THRESH
LENGTH
LENGTH
PINSEL
CKSEL
CLK_ACQ
RC oscillator
GCLK
INTERRUPT
DIS
SENSEn
SENSE0
Peripheral Bus
DMA Control
LEVEL
CLK_CATB
Table 34-1.
I/O Lines Description
Pin Name
Pin Description
Type
SENSE[n:0]
Capacitive sense line
Input/Output
DIS
Capacitive discharge line
Output