Atmel SAM4L-EK Atmel ATSAM4L-EK ATSAM4L-EK Data Sheet
Product codes
ATSAM4L-EK
962
42023E–SAM–07/2013
ATSAM4L8/L4/L2
36.6.2
Configuring the Lookup Table
The lookup table in each LUT unit can generate any logic expression OUT as a function of up to
four inputs, IN[3:0]. The truth table for the expression is written to the TRUTH register for the
LUT.
four inputs, IN[3:0]. The truth table for the expression is written to the TRUTH register for the
LUT.
shows the truth table for LUT0. The truth table for LUTn is written to TRUTHn,
and the corresponding input and outputs will be IN[4n] to IN[4n+3] and OUTn.
36.6.3
Output Filter
By default, the output OUTn is a combinatorial function of the inputs IN[4n] to IN[4n+3]. This may
cause some short glitches to occur when the inputs change value.
cause some short glitches to occur when the inputs change value.
It is also possible to clock the output through a filter to remove glitches. This requires that the
corresponding generic clock (GCLK) has been enabled before use. The filter can then be
enabled by writing a one to the Filter Enable (FILTEN) bit in CRn. The OUTn output will be
delayed by three to four GCLK cycles when the filter is enabled.
corresponding generic clock (GCLK) has been enabled before use. The filter can then be
enabled by writing a one to the Filter Enable (FILTEN) bit in CRn. The OUTn output will be
delayed by three to four GCLK cycles when the filter is enabled.
Table 36-2.
Truth Table for the Lookup Table in LUT0
IN[3]
IN[2]
IN[1]
IN[0]
OUT[0]
0
0
0
0
TRUTH0[0]
0
0
0
1
TRUTH0[1]
0
0
1
0
TRUTH0[2]
0
0
1
1
TRUTH0[3]
0
1
0
0
TRUTH0[4]
0
1
0
1
TRUTH0[5]
0
1
1
0
TRUTH0[6]
0
1
1
1
TRUTH0[7]
1
0
0
0
TRUTH0[8]
1
0
0
1
TRUTH0[9]
1
0
1
0
TRUTH0[10]
1
0
1
1
TRUTH0[11]
1
1
0
0
TRUTH0[12]
1
1
0
1
TRUTH0[13]
1
1
1
0
TRUTH0[14]
1
1
1
1
TRUTH0[15]