Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Data Sheet
Product codes
ATSAM4L-XSTK
481
42023E–SAM–07/2013
ATSAM4L8/L4/L2
20. Watchdog Timer (WDT)
Rev.: 5.0.1.0
20.1
Features
•
Watchdog Timer counter with 32-bit counter
•
Timing window watchdog
•
Clocked from system RC oscillator or one of the 32 KHz oscillator (OSC32 or RC32)
•
Configuration lock
•
WDT may be enabled at reset by a fuse
20.2
Overview
The Watchdog Timer (WDT) will reset the device unless it is periodically serviced by the soft-
ware. This allows the device to recover from a condition that has caused the system to be
unstable.
ware. This allows the device to recover from a condition that has caused the system to be
unstable.
The WDT has an internal counter clocked from the system RC oscillator or one of the 32 kHz
oscillator.
oscillator.
The WDT counter must be periodically cleared by software to avoid a watchdog reset. If the
WDT timer is not cleared correctly, the device will reset and start executing from the boot vector.
If the WDT is configured in interrupt mode an interrupt request will be generated on the first tim-
eout and a reset on the second timeout if the interrupt has not been cleared.
WDT timer is not cleared correctly, the device will reset and start executing from the boot vector.
If the WDT is configured in interrupt mode an interrupt request will be generated on the first tim-
eout and a reset on the second timeout if the interrupt has not been cleared.
20.3
Block Diagram
Figure 20-1. WDT Block Diagram
20.4
Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
below.
CLK_CNT
Watchdog
Detector
32-bit Counter
Watchdog
Reset
0
1
RCSYS
OSC32K
CSSEL
CEN
SYNC
CLK_CNT Domain
PB Clock Domain
PB
WDTCLR
WINDOW,
CLEARED
CLEARED
EN, MODE,
PSEL, TBAN
CTRL
CLR
SR
Watchdog
Interrupt