Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

When the APB clock for a module is not provided its registers cannot be read or written. The module can be re-enabled 
later by writing the corresponding mask bit to one.

A module may be connected to several clock domains (for instance, AHB and APB), in which case it will have several 
mask bits.

Note that clocks should only be switched off if it is certain that the module will not be used. Switching off the clock for the 
NVM Controller (NVMCTRL) will cause a problem if the CPU needs to read from the flash memory. Switching off the 
clock to the Power Manager (PM), which contains the mask registers, or the corresponding APBx bridge, will make it 
impossible to write the mask registers again. In this case, they can only be re-enabled by a system reset.

The latest reset cause is available in RCAUSE, and can be read during the application boot sequence in order to 
determine proper action.

CLK_PAC0_APB

Enabled

CLK_PM_APB

Enabled

CLK_SYSCTRL_APB

Enabled

CLK_GCLK_APB

Enabled

CLK_WDT_APB

Enabled

CLK_RTC_APB

Enabled

CLK_EIC_APB

Enabled

CLK_PAC1_APB

Enabled

CLK_DSU_APB

Enabled

CLK_NVMCTRL_APB

Enabled

CLK_PORT_APB

Enabled

CLK_HMATRIX_APB

Enabled

CLK_PAC2_APB

Disabled

CLK_SERCOMx_APB

Disabled

CLK_TCx_APB

Disabled

CLK_ADC_APB

Enabled

CLK_AC_APB

Disabled

CLK_DAC_APB

Disabled

CLK_PTC_APB

Disabled

CLK_USB_APB

Enabled

CLK_DMAC_APB

Enabled

CLK_TCC_APB

Disabled

CLK_I2S_APB

Disabled