Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

The USB module then fetches the Data Buffer Address (ADDR) from the addressed endpoint's descriptor, and waits for a 
DATA0 or DATA1 packet. If a PID error or any other PID than DATA0 or DATA1 is detected, the USB module returns to 
idle and waits for the next token packet.

If EPSTATUS.STALLRQ0 in EPSTATUS is set, the incoming data is discarded. If the endpoint is not isochronous, a 
STALL handshake is returned to the host and the Transmit Stall Bank 0 interrupt bit in EPINTFLAG 
(EPINTFLAG.STALL0) is set. 

For isochronous endpoints, data from both a DATA0 and DATA1 packet will be accepted. For other endpoint types the 
PID is checked against EPSTATUS.DTGLOUT. If a PID mismatch occurs, the incoming data is discarded, and an ACK 
handshake is returned to the host. 

If EPSTATUS.BK0RDY is set, the incoming data is discarded, the bit Transmit Fail 0 interrupt bit in EPINTFLAG 
(EPINTFLAG.TRFAIL0) and the status bit STATUS_BK.ERRORFLOW are set. If the endpoint is not isochronous, a NAK 
handshake is returned to the host.

The incoming data is written to the data buffer pointed to by the Data Buffer Address (ADDR). If the number of received 
data bytes exceeds the maximum data payload specified as PCKSIZE.SIZE, the remainders of the received data bytes 
are discarded. The packet will still be checked for bit-stuff and CRC errors. If a bit-stuff or CRC error is detected in the 
packet, the USB module returns to idle and waits for the next token packet.

If the endpoint is isochronous and a bit-stuff or CRC error in the incoming data, the number of received data bytes, 
excluding CRC, is written to PCKSIZE.BYTE_COUNT. Finally the EPINTFLAG.TRFAIL0 and CRC Error bit in the Device 
Bank Status register (STATUS_BK.CRCERR) is set for the addressed endpoint.

If data was successfully received, an ACK handshake is returned to the host if the endpoint is not isochronous, and the 
number of received data bytes, excluding CRC, is written to PCKSIZE.BYTE_COUNT. If the number of received data 
bytes is the maximum data payload specified by PCKSIZE.SIZE no CRC data bytes are written to the data buffer. If the 
number of received data bytes is the maximum data payload specified by PCKSIZE.SIZE minus one, only the first CRC 
data byte is written to the data buffer If the number of received data is equal or less than the data payload specified by 
PCKSIZE.SIZE minus two, both CRC data bytes are written to the data buffer.

Finally in EPSTATUS for the addressed output endpoint, EPSTATUS.BK0RDY is set and EPSTATUS.DTGLOUT is 
toggled if the endpoint is not isochronous. The flag Transmit Complete 0 interrupt bit in EPINTFLAG 
(EPINTFLAG.TRCPT0) is set for the addressed endpoint.

The number of data bytes received is stored in endpoint PCKSIZE.BYTE_COUNT as for normal operation. Since 
PCKSIZE.BYTE_COUNT is updated after each transaction, it must be set to zero when setting up a new transfer. The 
total number of bytes to be received must be written to PCKSIZE.MULTI_PACKET_SIZE. This value must be a multiple 
of PCKSIZE.SIZE, otherwise excess data may be written to SRAM locations used by other parts of the application. 

EPSTATUS.DTGLOUT management for non-isochronous packets and EPINTFLAG.BK1RDY/BK0RDY management 
are as for normal operation.

If a maximum payload size packet is received, PCKSIZE.BYTE_COUNT will be incremented by PCKSIZE.SIZE after the 
transaction has completed, and EPSTATUS.DTGLOUT will be toggled if the endpoint is not isochronous. If the updated 
PCKSIZE.BYTE_COUNT is equal to PCKSIZE.MULTI_PACKET_SIZE (i.e. the last transaction), 
EPSTATUS.BK1RDY/BK0RDY, and EPINTFLAG.TRCPT0/TRCPT1 will be set.