Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet

174

ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]

Atmel-8271H-AVR- ATmega-Datasheet_08/2014

 contains equations for calculating the baud rate (in bits per second) and for calculating the UBRRn 

value for each mode of operation using an internally generated clock source.

Note:

1.

The baud rate is defined to be the transfer rate in bit per second (bps)

Baud rate (in bits per second, bps)

System Oscillator clock frequency

Contents of the UBRRnH and UBRRnL Registers, (0-4095)

Some examples of UBRRn values for some system clock frequencies are found in 

 (see 

).

The transfer rate can be doubled by setting the U2Xn bit in UCSRnA. Setting this bit only has effect for the 
asynchronous operation. Set this bit to zero when using synchronous operation.

Setting this bit will reduce the divisor of the baud rate divider from 16 to 8, effectively doubling the transfer rate 
for asynchronous communication. Note however that the Receiver will in this case only use half the number of 
samples (reduced from 16 to 8) for data sampling and clock recovery, and therefore a more accurate baud rate 
setting and system clock are required when this mode is used. For the Transmitter, there are no downsides.

External clocking is used by the synchronous slave modes of operation. The description in this section refers to 

 for details.

Asynchronous Normal mode 
(U2Xn = 0)

Asynchronous Double Speed 
mode (U2Xn = 1)

Synchronous Master mode

16 UBRRn 1

+





------------------------------------------

=

16BAUD

------------------------

1

–

=

8 UBRRn 1

+





---------------------------------------

=

8BAUD

--------------------

1

–

=

2 UBRRn 1

+





---------------------------------------

=

2BAUD

--------------------

1

–

=